CÔNG TY TNHH INTEL PRODUCTS VIỆT NAM

• Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.• Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.• Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.• Analyzes results and makes recommendations to fix violations for current and future product architecture.• Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools.• Optimizes design to improve product level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation.Bachelor or master's degree in Electronics Engineering/Telecommunications, Computer Engineering, Computer science, Physics electronics, or equivalent with 5 years plus of relevant working experience.In depth exposure to VLSI structural physical design methodology flows and relevant EDA tools.Proficient in scripting languages such as UNIX Perl TCL and knowledge of hardware description languages of VHDL VerilogProven track record of results and execution in a tight schedule environment.Good verbal and written English skills.Strong analytical, problem solving and decision-making skills with the ability to independently draw conclusions.