R-PAC 1.0 ★

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell is empowering the global data economy. Whether at the network core or edge, our leadership technologies make it possible for the world’s data to be processed, moved, stored and secured faster and more reliably. With leading intellectual property and deep system-level knowledge, Marvell's infrastructure semiconductor solutions are transforming the 5G, cloud computing, enterprise and automotive markets of tomorrow.

Marvell Vietnam is one of Marvell Research and Development (R&D) centers. We are seeking talented engineers to join our ASIC Development team and work with the most advanced technologies in IC design.

What You Can Expect

• Work with IP/SoC architecture to study design feasibilities meeting PPA requirements.
• Create Micro-architecture specification (MAS), perform RTL coding based on MAS using best RTL coding practices, and integrate the RTL into the IP/SoC.
• Perform RTL code review, apply tools to formally check/fix RTL against various design rules.
• Work with the verification team to define test-plan, debug/fix failures, analyze coverage.
• Define verification strategy and do verification to make sure verification closure.
• Cooperate with Synthesis, DFT, STA, PnR teams to solve issues related to in-charged IP.
• Support Emulation, FPGA prototype, functional ATE, and silicon validation teams.
  
  

What We're Looking For

• Degree in Computer Science, Electrical Engineering, or related fields and 8+ years of related professional experience. Less experienced candidate with 8+ educational GPA are welcome.
• Proven track record of digital IP design from concept to successful ASIC/SoC project TOs.
• Very familiar with digital IC design methodologies, understand all stages of ASIC design flows, and experienced with state-of-the-art design tools.
• Hands-on behavioral and RTL coding experience, Verilog/SV preferred.
• Hands-on verification different abstract levels including block, IP and SoC
• Strong knowledge of verification methodology, logic synthesis and timing analysis.
• Very good at documentation and communication skills using English.
• Experiences in UVM verification methodology is a plus
• Experiences in Ethernet/DDR/SRAM/NVMe/NVMoF IP is a big plus.
• Experiences in USB/PCIe/USB/SAS/SATA IP, ARM-based SoC, Emulation, FPGA is a plus.
  
  

Additional Compensation And Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.