Synopsys Việt Nam ( Piktec - Time Partition Testing ) ★ 3.6

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly motivated individual with a passion for physical design and implementation of complex Mixed Signal IPs and test chips. With a strong background in physical design, you thrive on solving intricate problems and enjoy collaborating with cross-functional teams. You have a deep understanding of the full design cycle from RTL to GDSII and are adept at using Synopsys tools and methodologies. Your excellent communication skills and problem-solving mindset enable you to convey complex ideas to various stakeholders, deliver robust solutions and mentor others, making you a key contributor to innovative projects. You are autonomous, make timely decisions, and can handle interruptions while maintaining focus on your goals.

What You’ll Be Doing:

• Leading the physical implementation of high-speed interface IPs from RTL to GDS, ensuring timing and physical sign-off.
• Collaborating with cross-functional teams to integrate and verify IP designs to achieve project goals.
• Providing technical guidance and mentorship.
• Continuously improving design methodologies and processes to enhance efficiency and quality.
  
  

The Impact You Will Have:

• Driving the development of high-performance physical IP that powers next-generation technologies.
• Ensuring the reliability and efficiency of physical design solutions in our products.
• Contributing to the success of Synopsys' strategic goals through innovative design solutions.
• Sharing technical expertise to elevate team capabilities.
• Fostering a culture of continuous improvement and excellence within the engineering team.
• Supporting the adoption and usability of our products by providing top-tier engineering expertise.
  
  

What You’ll Need:

• BE or MSEE with 10+ years of direct physical design experience.
• Proficiency in full design cycle from RTL to GDSII, with a focus on Physical Design.
• Solid engineering understanding of IC design, implementation flows, and methodologies for deep submicron design.
• Advanced PnR and sign-off skills (STA, PV, EMIR) to validate design robustness.
• Excellent problem-solving abilities and a keen eye for detail.
  
  

Who You Are:

• A proactive and independent worker with minimal need for supervision.
• An effective communicator with the ability to influence and collaborate with cross-functional teams.
• A strategic thinker who can evaluate complex issues and provide innovative solutions.
• A dedicated professional committed to continuous improvement and excellence.
• A passionate engineer driven by the opportunity to contribute to cutting-edge technologies.
  
  

The Team You’ll Be A Part Of:

You will be part of the Synopsys Mixed-Signal IP organization, a team dedicated to the physical implementation of complex Mixed Signal IPs and test chips. This team collaborates closely with multiple functional groups including front-end, analog, CAD, and product teams to deliver high-quality design solutions that meet the unique performance, power, and size requirements of our customers’ applications.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.